---
title: 'Internships: Hardware Physical Design / VLSI at NVIDIA'
description: 'NVIDIA is hiring for the Internships: Hardware Physical Design / VLSI role in
  Santa Clara, CA. See the full description and apply.'
type: job
url: https://www.foundrole.com/jobs/internships-hardware-physical-design-vlsi-at-nvidia-01a0b2fe-30ed-7c7a-88ff-669aa04e4a06
date: 2026-11-15T01:26:44Z
og_description: 'Join NVIDIA as Internships: Hardware Physical Design / VLSI in Santa Clara, CA.
  Pays $20–$71 per hour. Full-time, on-site role.'
og_image: https://www.foundrole.com/og/52f04i.png
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---

| | |
|---|---|
| **Company** | [NVIDIA](https://www.foundrole.com/companies/nvidia?utm_source=ai_markdown) |
| **Location** | Santa Clara, CA |
| **Salary** | $20/hr - $71/hr |
| **Type** | Full Time, Intern |
| **Posted** | Oct 12, 2026 |

## Is this job real?

**Ghost job check:** C · Some flags. Mostly fine, a few things to check.

## Visa sponsorship

- **H-1B:** NVIDIA sponsors H-1B visas. It filed 3,120 H-1B petitions (FY2026 Q1 – FY2026 Q4).
- **E-Verify:** No E-Verify enrollment on record for NVIDIA.

## Pay for similar jobs

Most similar jobs pay $170,000 – $253,000 a year (median $216,000).

## Description

By submitting your resume, you acknowledge that your Hardware Physical Design / VLSI internship application will be processed in accordance with NVIDIA’s [Applicant Privacy Policy](https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nvidia.com%2Fen-us%2Fabout-nvidia%2Fcareers%2Fapplicant-privacy-policy%2F&data=05%7C02%7Cnsopoaga%40nvidia.com%7Cc3e4e3152b0d405d836c08def7f16d68%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C639220813482024346%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=LBkInKRjwzqtrzeHhFra7HjbypK37lgC%2FJworas9UmA%3D&reserved=0) and you agree to our [Terms of Service](https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nvidia.com%2Fen-us%2Fabout-nvidia%2Fterms-of-service%2F&data=05%7C02%7Cnsopoaga%40nvidia.com%7Cc3e4e3152b0d405d836c08def7f16d68%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C639220813482054908%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=58ghZJdkuBxUugcTaOeqbT9cmuUlcPBM%2BqLPynMRGkU%3D&reserved=0). We’ll review resumes on an ongoing basis, and a recruiter may reach out if your experience fits one of our many internship opportunities.

NVIDIA pioneered accelerated computing to tackle challenges no one else can solve. Our work in AI and digital twins is transforming the world's largest industries and profoundly impacting society — from gaming to robotics, self-driving cars to life-saving healthcare, climate change to virtual worlds where we can all connect and create. Our internships offer an excellent opportunity to expand your career and get hands on experience with one of our industry leading Hardware teams. We’re seeking strategic, ambitious, hard-working, and creative individuals who are passionate about helping us tackle challenges no one else can solve.

Throughout the 12-week full-time internship, students will work on projects that have a measurable impact on our business. We’re looking for students pursuing a B.S., M.S., or Ph.D. degree within a relevant or related field.

**What we need to see:** 

- Must be actively enrolled in a university pursuing a B.S., M.S., or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field, for the full duration of the internship; **anticipated graduation date (**month and year**)** must be clearly indicated on a resume or CV to be considered.

**Course or internship experience related to the following areas could be required:**

- Floorplanning, Place and Route (P&R), Static Timing Analysis (STA), Power Integrity and IR Drop Analysis, Physical Verification (DRC/LVS), Clock Tree Synthesis (CTS)
- VLSI, Computer Architecture, Digital/Micro Electronics, Mixed-Signal Design, Digital Design, Logic Design
- CAD and Physical Design Methodologies (Flow and Tools Development), as well as implementation
- Synthesis, Static Timing Analysis, Clock/Power Distribution and Analysis, RC Extraction and Correlation, Place and Route, Circuit Design
- Chip Floor Plan, Power/Clock Distribution, Chip Assembly, Timing Closure, Power and Noise Analysis, and Back-End Verification
- EDA Vendor (Synopsys, Cadence, Mentor, etc.) tool suites such as: ICC2, PrimeTime, dc_shell, Innovus, SeaHawk
- **Depending on the internship role, prior experience or knowledge requirements could include the following programming skills and technologies:** Perl, C, C++, TCL, Linux, Scheme, Python, SKILL, Make, ICC2, Design Compiler, PrimeTime (Synopsys, First Encounter), Innovus, Virtuso (Cadence)

Click [here](http://www.nvidia.com/content/dam/en-zz/Solutions/about-nvidia/careers/UR-Student-Resources.pdf) to learn more about NVIDIA, our early talent programs, benefits offered to students and other helpful student resources related to our latest technologies and endeavors.

Our internship hourly rates are a standard pay based on the position, your location, year in school, degree, and experience. The expected hourly rate for this position is 20 USD – 71 USD.

You will also be eligible for Intern [benefits](https://www.nvidia.com/en-us/benefits/interns/). ​

Applications are accepted on an ongoing basis.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
## Skills

- Correlation Analysis
- C
- Clock Distribution
- Perl
- Computer Architecture
- VLSI Design
- Robotics
- Synopsys PrimeTime
- Python
- Cadence Innovus
- Circuit Design
- Timing Closure
- LVS/DRC (Layout Vs Schematic / Design Rule Check)
- Static Timing Analysis
- EDA Software
- Cadence Virtuoso
- Tool Command Language Tcl
- IR Drop Analysis
- Digital Design
- Clock Tree Synthesis
- Compiler Design
- Mixed-Signal Design
- Computer Vision
- Noise Analysis
- C++
- Scheme
- Computer-Aided Design
- Digital Twin
- Computer Engineering
- Physical Design
- Physical Verification
- Linux
- Power Integrity
- Electrical Engineering
- Power Distribution
- Synopsys

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